Claudine V. Wong

Claudine Wong is a patent associate in the firm’s Palo Alto office.

Prior to joining K&L Gates, Ms. Wong spent 15 years working in the Silicon Valley semiconductor industry, as a pre-silicon design verification engineer. She is well-versed in multiple programming and scripting languages, and has extensive background in verification methodology, testbench design, complex algorithms, and tool workflows.

Good to know

Areas of Practice 1) IP Procurement and Portfolio Management
Law School Santa Clara University School of Law, J.D., 2013
Education University of California, Berkeley, B.S., 1997
Bar Member / Association California State Bar Association
Most recent firm K & L Gates
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